Universitas Gadjah Mada – Website of Academic Staffs

Research Interests

• E-Learning & Multimedia to Support E-Learning
• Information System & IT for Education
• Artificial Intelligent
• Engineering Education
• Computer Network & Data Communication
• Channel Coding & Design Channel Coding using FPGA

Papers:

Statistical-based Machine Translation for Prepositional Phrase using Link Grammar

Adji, T.B.; Astuti, Y.; Kusumawardani, S.S.;
EE & IT Dept., Gadjah Mada Univ., Yogyakarta, Indonesia

This paper appears in: International Conference on Electrical Engineering and Informatics (ICEEI), 2011 and IEEE Xplore Digital Library

Issue Date :  17-19 July 2011
On page(s): 1 – 6
ISSN :  2155-6822
Print ISBN: 978-1-4577-0753-7
INSPEC Accession Number: 12246119
Digital Object Identifier :  10.1109/ICEEI.2011.6021644
Date of Current Version :   19 September 2011

ABSTRACT

The Internet provides most information in English language. However, most people are non-English speaker. Hence, it will be a great advantage for the people to have reliable machine translation. The expectation from the Machine Translation (MT) is sentences translation in a natural way based on the contexts. There are some reasons of why MT is hard to develop. One of the cause is there exists many mapping from source to target words in one-to-many, many-to-one, and many to-many. For example, an English preposition can have more than one translation in Indonesian words depend on the context. This research tries to find a technique that can provide a suitable translation of the English prepositions to the Indonesian words.

The technique will use LG formalism and statistical method. The meaning of preposition in a sentence depends on the preceding word and the following word. The word before the preposition is a word explained by the preposition. Meanwhile, the word after a preposition is a word that explains the preposition. Knowing that both preceding and following words are not always precisely in the right and left positions of the preposition, we then need a method to find those connected words. We try to handle the problem by using LG formalism. LG formalism consists of a set of words and each word has a linking requirement. Using this linking requirement, the words that have a link to the preposition can be resolved. After obtaining the connected words, the translation is done using statistical method. Statistical method translates the preposition based on the probability of the relation which is obtained from LG formalism.

This work expresses its relation in the bigram form. If an English preposition bigram has more than one Indonesian translation, then the output is the bigram that have the biggest probability. In this research, the combination between LG formalism and statistical method give a better English preposition translation than the existing methods.

Implementation of error trapping technique in (31,16) cyclic codes for two-bit error correction in 16-bit sound data using Labview Software

Atmojo, U.D.; Kusumawardani, S.S.;
EE & IT Dept., Gadjah Mada Univ., Yogyakarta, Indonesia

This paper appears in:  International Conference on Distributed Framework and Applications (DFmA), 2010 and IEEE Xplore Digital Library

Issue Date :  2-3 Aug. 2010
On page(s): 1 – 6
Print ISBN: 978-1-4244-9335-7
INSPEC Accession Number: 12111168
Date of Current Version :   14 Juli 2011

ABSTRACT

This paper considers the implementation of cyclic codes encoder and decoder for multimedia content in the form of sound data using National Instruments LabView software. Cyclic codes can be defined by two parameters, which are code size n and information bit size k. LabView is an easy to use, multipurpose software which has many features for designing and prototyping. This research is a preliminary research on channel coding implementation on LabView.

In this research, cyclic codes are used to implement the design. 16-bit sound data are used as test subjects for cyclic code encoding, decoding, and error correction. The result shows that the design works well. The design can correct short two-bit error in last n-k position of the codeword. Authors’ next project is to implement more advanced code for error correcting implementation in LabView.

Improving SME ICT utilization through Industrial Attachment Program: Indonesia case

Santosa, P.I.; Kusumawardani, S.S.;
Dept. of Electr. Eng. & Inf. Technol., Universitas Gadjah Mada, Indonesia

This paper appears in:  Frontiers in Education Conference (FIE), 2010 IEEE and IEEE Xplore Digital Library
Issue Date :  27-30 Oct. 2010
On page(s): S1J-1 – S1J-5
ISSN :  0190-5848
E-ISBN :  978-1-4244-6260-5
Print ISBN: 978-1-4244-6261-2
References Cited: 7
INSPEC Accession Number: 11705116
Digital Object Identifier :  10.1109/FIE.2010.5673230
Date of Current Version :   23 Desember 2010

ABSTRACT

This paper reports the deployment of a group of students to several SME in an Industrial Attachment Program (IAP). The students were all engineering students who have previously attended courses conducted by Cisco Networking Academy and have passed certain computer networking certifications. The participating SME were those who are doing business in furniture and garment in the area of Jawa Tengah and Daerah Istimewa Yogyakarta, Indonesia. The primary goal of the IAP is to bridge the gap between students’ technical ICT ability and SME’ specific ICT needs.

Through the IAP program, students got the opportunity to build the capacity through real time projects that integrate practical “IT essentials” skills into SME. The main students’ activities were categorized into three areas, namely operational, business and technology, and strategic. These aspects were tailored according to the individual SME’s needs. Each student had to prepare a work plan he/she started working at the assigned SME respectively. Before the end of the internship, each student had to produce a road map that shows the development of SME ICT utilization for 2 years to come. The complete road map was eligible to be submitted for a competition that the winner would be presented with a special prize.

Designing 1 bit Error Correcting Circuit on FPGA Using BCH Codes

Sri Suning Kusumawardani and Bambang Sutopo, IEEE

Proc. of the International Conf. on Electrical, Electronics, Communication, and Information
CECI’2001, March 7-8, Jakarta 

ABSTRACT

This paper considers the prototyping of a BCH (Bose, Chaudhuri, and Hocquenghem) encoder and decoder using FPGA  (Field Programmable Gate Array). BCH codes can be defined by two parameters that are code size n and the number of errors to be corrected t. FPGA is a reprogramable chip. Designing on FPGA is very fast, easy to modify and suitable for prototyping products. This research is our preliminary research on implementation BCH coding in FPGA.

The results show that the circuits work well, any 1 bit error in any position of  7 bits has been corrected.  Our next project is to build 3 bits error correction of 5 bit data, and BCH code size will be 15 bits.

Keywords– BCH codes, encoding, decoding, FPGA, error correcting code

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